CS302 Current Final Term Paper Spring 20 August 2017

CS-302 current final term solve paper 20 august 2017

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CS-302 Final term Solved Paper Spring 2017

Question No: 1 ( Marks: 1 ) – Please choose one Caveman number system is Base ______ number system 

► 2

► 5 (Page 11)

► 10

► 16

Question No: 2 ( Marks: 1 ) – Please choose one
The output of an XOR gate is zero (0) when __________ I) All the inputs are zero II) Any of the inputs is
zero III) Any of the inputs is one IV) All the inputs are one

► I Only

► IV Only

► I and IV only (Page 53)

► II and III only

Question No: 3 ( Marks: 1 ) – Please choose one

The decimal “17” in BCD will be represented as _________10001(right opt is not given)

► 11101

► 11011

► 10111 (According to rule) rep

► 11110

Question No: 4 ( Marks: 1 ) – Please choose one
The simplest and most commonly used Decoders are the ______ Decoders

► n to 2n (Page 158)

► (n-1) to 2n

► (n-1) to (2n-1)

► n to 2n-1

Question No: 5 ( Marks: 1 ) – Please choose one
The low to high or high to low transition of the clock is considered to be a(n) ________

► State

► Edge (Page 228)

► Trigger

► One-shot

Question No: 6 ( Marks: 1 ) – Please choose one ___________ is one of the examples of asynchronous inputs. 

► J-K input

► S-R input

► D input

► Clear Input (CLR) (Page 255) rep

Question No: 7 ( Marks: 1 ) – Please choose one In ________ outputs depend only
on the current state.

► Mealy machine

► Moore Machine (Page 332)

► State Reduction table

► State Assignment table

Question No: 8 ( Marks: 1 ) – Please choose one
Smallest unit of binary data is a ________

► Bit (Page 394)
► Nibble

► Byte

► Word

Question No: 9 ( Marks: 1 ) – Please choose one
A Nibble consists of _____ bits

► 2

► 4 (Page 394) rep

► 8

► 16

Question No: 10 ( Marks: 1 ) – Please choose one
DRAM stands for __________

► Dynamic RAM (Page 407) rep

► Data RAM

► Demoduler RAM

► None of given options

Question No: 11 ( Marks: 1 ) – Please choose one
The sequence of states that are implemented by a n-bit Johnson counter is

► n+2 (n plus 2)

► 2n (n multiplied by 2) (Page 354) rep

► 2n (2 raise to power n)

► n2 (n raise to power 2)

Question No: 12 ( Marks: 1 ) – Please choose one
Stack is an acronym for _________

► FIFO memory

► LIFO memory (Page 429) rep

► Flash Memory

► Bust Flash Memory

Question No: 13 ( Marks: 1 ) – Please choose one
Excess-8 code assigns _______ to “+7”

► 0000 (Page 34) rep

► 1001

► 1000

► 1111

Question No: 14 ( Marks: 1 ) – Please choose one
A positive edge-triggered flip-flop changes its state when ________________

► Low-to-high transition of clock (Page 228)

► High-to-low transition of clock

► Enable input (EN) is set

► Preset input (PRE) is set

Question No: 15 ( Marks: 1 ) – Please choose one

The design and implementation of synchronous counters start from _________

► Truth table

► k-map

► state table

► state diagram (Page 319) rep

Question No: 16 ( Marks: 1 ) – Please choose one
In ________ outputs depend only on the current state.

► Mealy machine

► Moore Machine (Page 332) rep

► State Reduction table

► State Assignment table

Question No: 17 ( Marks: 1 ) – Please choose one
A synchronous decade counter will have _______ flip-flops

► 3

► 4 (Page 281)
► 7

► 10

Question No: 18 ( Marks: 1 ) – Please choose one
A 8-bit serial in / parallel out shift register contains the value “8”, _____ clock signal(s) will be required to shift the value completely out of the register.

► 1

► 2

► 4

► 8 (Page 356)

Question No: 19 ( Marks: 1 ) – Please choose one
The divide-by-60 counter in digital clock is implemented by using two cascading counters:

► Mod-6, Mod-10 (Page 299)
► Mod-50, Mod-10

► Mod-10, Mod-50

► Mod-50, Mod-6

Question No: 20 ( Marks: 1 ) – Please choose one
The minimum time for which the input signal has to be maintained at the input of flip-flop is called ______ of the flip-flop.

► Set-up time

► Hold time (Page 242)

► Pulse Interval time

► Pulse Stability time (PST)

Question No: 21 ( Marks: 1 ) – Please choose one
A Nibble consists of _____ bits

► 2

► 4 (Page 394)

► 8

► 16

Question No: 22 ( Marks: 1 ) – Please choose one
Excess-8 code assigns _______ to “-8”

► 1110

► 1100

► 1000

► 0000 (Page 34)

Question No: 23 ( Marks: 1 ) – Please choose one
The voltage gain of the Inverting Amplifier is given by the relation ________

► Vout / Vin = – Rf / Ri (Page 446)

► Vout / Rf = – Vin / Ri

► Rf / Vin = – Ri / Vout

► Rf / Vin = Ri / Vout

Question No: 24 ( Marks: 1 ) – Please choose one
Stack is an acronym for _________

► FIFO memory

► LIFO memory (Page 429)

► Flash Memory

► Bust Flash Memory

Question No: 25 ( Marks: 1 ) – Please choose one
___________ is one of the examples of synchronous inputs.

► J-K input (Page 235)

► EN input

► Preset input (PRE)

► Clear Input (CLR)

Question No: 26 ( Marks: 1 ) – Please choose one
In a state diagram, the transition from a current state to the next state is determined by

► Current state and the inputs (Page 332)

► Current state and outputs

► Previous state and inputs

► Previous state and outputs

Question No: 27 ( Marks: 1 ) – Please choose one
________ is used to simplify the circuit that determines the next state. 

► State diagram

► Next state table

► State reduction

► State assignment (Page 335)

Question No: 28 ( Marks: 1 ) – Please choose oneA 8-bit serial in / parallel out shift register contains the value “8”, _____ clock signal(s) will be required to shift the value completely out of the register.

► 1

► 2

► 4

► 8 (Page 356) rep

Question No: 29 ( Marks: 1 ) – Please choose oneThe operation of J-K flip-flop is similar to that of the SR flip-flop except that the J-K flip-flop ___________

► Doesn’t have an invalid state (Page 232)

► Sets to clear when both J = 0 and K = 0

► It does not show transition on change in pulse

► It does not accept asynchronous inputs

Question No: 30 ( Marks: 1 ) – Please choose onein ____________, all the columns in the same row are either read or written.

► Sequential Access

► MOS Access

► FAST Mode Page Access (Page 413)

► None of given options

Question No: 31 ( Marks: 1 ) – Please choose oneA frequency counter ______________

► Counts pulse width

► Counts no. of clock pulses in 1 second (Page 301)
► Counts high and low range of given clock pulse

► None of given options

Question No: 32 ( Marks: 1 ) – Please choose oneThe divide-by-60 counter in digital clock is implemented by using two cascading counters:

► Mod-6, Mod-10 (Page 229) rep

► Mod-50, Mod-10

► Mod-10, Mod-50

► Mod-50, Mod-6

Question No:33 ( Marks: 1 ) – Please choose oneThe voltage gain of the Inverting Amplifier is given by the relation ________ 

► Vout / Vin = – Rf / Ri (Page 446)

► Vout / Rf = – Vin / Ri

► Rf / Vin = – Ri / Vout

► Rf / Vin = Ri / Vout

Best of Luck